For a nonvolatile memory capable of retaining information even when power is turned off, a flash memory and a ferroelectric memory are known.
Of the two, flash memory, which has a floating gate embedded in a gate insulating film of an insulated-gate field-effect transistor (IGFET), stores information by accumulating the charge representing the information and storing it in the floating gate. Flash memory, however, is disadvantageous in that a tunneling current has to flow through the gate insulating film when the information is written or erased, and this requires a relatively high voltage.
On the contrary, ferroelectric memory, which is also called FeRAM (Ferroelectric Random Access Memory), stores information by utilizing the hysteresis properties of a ferroelectric film formed in a ferroelectric capacitor. The ferroelectric film becomes polarized depending on the voltage applied between the upper electrode and the lower electrode of the capacitor, and the spontaneous polarization remains even when the voltage is removed. When the polarity of the applied voltage is reversed, the spontaneous polarization is also reversed. Information is written to the ferroelectric film by relating the direction of the spontaneous polarization to “1” and “0”. The FeRAM is advantageous in that the voltage required for writing is lower than in a flash memory and that information can be written therein faster than in a flash memory.
The FeRAM is broadly grouped under either stack-type or planer-type depending on its structure. The latter, the planer type, has a MOS transistor and capacitor lower electrode formed on a semiconductor substrate which are electrically connected through metal wiring above the capacitor. The planar type tend to have a larger capacitor area.
On the contrary, in a stack-type FeRAM, a capacitor lower electrode is formed directly on a conductive plug connected to source/drain regions of a MOS transistor. The lower electrode and the MOS transistor are electrically connected through the conductive plug. This structure allows the capacitor to have a smaller area compared with the planer-type. Hence, the stack-type is advantageous to the miniaturization of FeRAM desired in the future.
In the stacked type FeRAM an opening in which the conductive plug is embedded directly under the capacitor must to be formed with high accuracy in order to achieve the desired miniaturization. Improving the accuracy in finishing the opening is an important factor in regard to miniaturization.
Examples of the abovementioned stack-type FeRAM are disclosed in Japanese Patent Laid-Open No. 2001-358311 and Japanese Patent Laid-Open No. 2003-68993.